Bridging faults modeling and detection in CMOS combinational gates

A method based on the detectability of bridging faults through test sets developed to locate other types of faults is presented. In particular it will be shown how bridging faults can be detected in CMOS combinational circuits using a test procedure that detects transistor stuck-at faults in a new design for testability for fully CMOS logic. The detection of more than 95% of the possible bridging faults (single and multiple) is achieved.<
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