Detection of control flow errors using signature and checking instructions

An approach is presented to the online detection of control flow errors caused by transient and intermittent faults in microprocessor systems. It is based on the idea of signatured instruction streams. Signatures are embedded into the program memory using the monitored processor instructions. Compared with existing techniques, the presented approach is universal and can be easily implemented using off-the-shelf programmable array logic and LCA circuits. The hardware overhead ranges from one to several chips for microprocessors with 8-bit and 16-bit data buses. Program memory overhead is 10-20% and quite often no extra memory chip is required. A special software module has been developed to embed signatures and checkpoints into application programs.<
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