A 12-bit, 1-MHz, two-step flash ADC

A monolithic 12-b 1 MHz, two-step flash analog-to-digital converter (ADC) has been implemented in standard 3- mu m CMOS technology. A 12-b accurate reference bank incorporating a switched-capacitor integrator and a bank of 66 sample-and-hold amplifiers is discussed. Self-calibration techniques are used to correct for the converter offset, gain, and nonlinearity errors. The converter differential nonlinearity errors below 1/2 LSB and the S/(N+D) signal to noise is 70 dB for 100-kHz analog input.<
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