Processor architectures for fault tolerant avionic systems

The authors consider the application of modern processor architectures to avionics systems requiring fault masking during critical flight dynamic phases such as ascent or entry. Fault masking implies uninterrupted control during the period of fault detection, identification and recovery (FDIR). To provide this uninterrupted control requires tight coordination between redundant processors. The impact of the requirement for fault masking capability through tightly coupled processors on modern processor architectures is discussed.<
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