Transmission Line Pulsing Tester For On-chip ESD Protection Testing

In the paper transmission line pulsing (TLP) methodology and testers are described. In contrast to commonly available publications, which usually lack information on testers' design, the authors describe TLP tester's construction details. This includes an applied electric diagram. Conclusions based on up-to-date research and preliminary test results obtained with the help of the assembled TLP tester are provided