The electrical properties of HfO/sub 2/ dielectric on germanium and the substrate doping effect

MOS devices built on various germanium substrates, with chemical vapor deposited (CVD) or physical vapor deposited (PVD) HfO/sub 2/ high-/spl kappa/ dielectric and TaN gate electrode, were fabricated. The electrical properties of these devices, including the capacitance equivalent thickness (CET), gate leakage current density (J/sub g/), slow trap density (D/sub st/), breakdown voltage (V/sub bd/), capacitance-voltage (C-V) frequency dispersion, and thermal stability, are investigated. The process conditions such as surface nitridation treatment, O/sub 2/ introduction in CVD process and postdeposition anneal temperature in PVD process, exhibit significant impacts on the devices' electrical properties. The devices built on germanium substrates with different dopant types and doping concentrations show remarkable variations in electrical characteristics, revealing the role of the substrate doping in the reactions occurring at the dielectric/Ge interface, which can significantly affect the interfacial layer formation and Ge updiffusion. A possible mechanism is suggested that two competing processes (oxide growth and desorption) take place at the interface, which govern the formation of the interfacial layer. Doped p-type (Ga) and n-type (Sb) impurities may enhance the different process at the interface and cause the variations in the interfacial layer formation and so on in electrical properties. The high diffusivities of impurities and Ge atoms in Ge and the induced structural defects near the substrate surface could be one possible cause for this doping effect. As another behavior of the substrate doping effect, Ge n-MOS and p-MOS stacks show quite different C-V characteristics after high temperature postmetallization anneal treatments, which can be explained by the same mechanism.