A model for the distortion due to switch on-resistance in sample-and-hold circuits

A behavioral model of a sample-and-hold circuit is presented, focused on the distortion due to the nonlinear switch on-resistance. A simplified expression for third-order harmonic distortion has been derived, by using a quadratic MOS model where body effect is neglected, and it has been extended to the case of a transmission gate switch. Both the behavioral model and the distortion estimation have been validated by comparison with Cadence simulations, and very low errors have been obtained over a wide range of circuital and signal parameters