Simulation techniques for noise-analysis in the PLL design process

The phase-locked loop (PLL) has become one of the most commonly used circuits in electrical engineering nowadays. Therefore, there is a great need for both a solid mathematical theory, especially in the presence of noise, and practical design rules that help the PLL designer to improve the circuit performance. Although numerous papers have been published on both issues separately, there is still a huge demand to make the, often times rather advanced, mathematical theory of stochastic differential equations, needed to accurately model the noise in PLLs, more accessible for the circuit designer with merely a basic background in stochastic calculus. This paper is intended to show that, thanks to the performance of modern personal computers, one can derive results with accuracy comparable to the ones obtained from the so called Fokker-Planck technique using a Monte-Carlo simulation approach that can be understood and used in practice with merely an average background in probability