A Voltage Efficient PMOS Charge Pump Architecture

In this paper a charge pump circuit is presented: it is based on PMOS pass transistors with dynamic control of the gate and body voltages. By controlling the gate and the bulk of each PMOS pass transistor, the voltage loss due to the device threshold is removed and the charge is pumped from one stage to the other with negligible voltage drop. Furthermore, the overdrive voltage of the pass transistors grows progressively from the first to the last stage. Hence, a larger output voltage can be achieved compared to conventional charge pumps, still retaining a simple two-phase clocking scheme, along with the Dickson basic architecture. The prototype was fabricated using the STMicroelectronics T10 90nm CMOS process. Measurements results are also presented confirming the validity of the design.