Adder With Distributed Control

An adder is described for addition of a large number of binary numbers x
j
, j=1, 2, ⋯, m, where x
j
=∑
i
x
ji
⋅ 2
ⁱ
, x
ji
=0, 1, i=0, 1, ⋯, n-1. The adder's algorithm has two parts: 1) the bits x
ji
are added independently for each binary order i:s
i
=∑
j
x
ji
≦m and the result expressed in the binary form s
i
=∑
k
a
ik
, ⋅ 2
^k
, a
ik
=0, 1, k=0, 1,⋯, p-1 (where 2
^p-1
≦m<2
^p
); 2) the sum y=∑
j
x
j
is formed by adding terms s
ik
·
^2
i+k
as contributions of the bit s
ik
to the total y. A hardware implementation of this algorithm is suggested where the sum s; is obtained by a sequential circuit which reorders the values x
ji
so that their sum s
i
, remains unchanged and so that after the reordering the new values x
ji
ⁱ
obey the conditions x
j+1,i
≦x
ji
for every j=1, 2,⋯, m-1. The implementation with integrated circuits should be quite rewarding because the control of the circuit is done with independent control elements distributed all over the chip.