Wide Voltage Power Device implementation in O.25 μm SOI BiC-DMOS

In this paper, a new SOI BiC-DMOS process based on the 0.25mum CMOS process is introduced. SOI and dielectric isolation enables implementation of wide voltage and various types of lateral power devices. For Nch devices, 40V/60V/ 80V/100V/170V LDMOS and 170V/200V lateral IGBT were developed. The drift layers of LDMOS are optimized respectively. The 0.25mum CMOS process helps not only to shrink low voltage class devices such as 40V LDMOS but also to improve the SOA characteristics of high voltage devices