Industrialisation of Resurf Stepped Oxide Technology for Power Transistors

The interaction of fabrication processes and device performance in RSO (resurf stepped oxide) transistors is explored in this paper. Critical process steps for achieving good control of resurf behaviour are the etching of the deep trenches, their refill with thick oxide and etch-back to define the oxide step. Optimum conditions result in typical Rspec of 46mOmega.mm
²
at a BVdss of 80V and defect densities less than 3 cm
^-2
. Qgd values of about 9 nC/mm
²
limit the single-gate polysilicon RSO structure to low frequency applications, such as switching automotive loads. Simulation has indicated that the introduction of a split-polysilicon RSO structure, with source-connected bottom poly, gives excellent Rds.Qgd values, which are an order of magnitude lower, hence extending the scope of the technology to high frequency applications