Offset-compensation of two-phase switched-capacitor filters

A method for the rejection of low-frequency and offset signals in two-phase switched-capacitor filters is described, along with the treatment of offset compensation using reset cycles. The method applies to all switched-capacitor structures where a DC-path can be found from a node inside the filter to the output. The idea is to connect an offset-free integrator in a feedback loop within the original filter structure. The net effect of the loop for continuous-time applications is an overall high-pass response. The resulting transfer-function distortion can be compensated for by making a small change in one capacitor. Design examples are given for a leapfrog and a cascaded biquad filter. Experimental breadboard designs and computer simulations have verified the applicability of the method.<
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