Multiple Valued Counter

This paper introduces a multiple valued counter, based on recharged semi floating gate structures. The counter starts at a sampled voltage, and counts from there, using an input clock signal as an input. Depending on the sampled value and the phase of the input clock signal - the counter can count both up and down. The counting steps can be varied adjusting the input clock amplitude, which in combination with different output resetting values allows a set of different counting radixes. Recharged semi floating structures may suffer from an offset at the output due to mismatch in the inverter structures. This counter minimizes this problem with a build in offset cancellation, which is an advantage for non capacitive readouts