Automatic custom layout of analog ICs using constraint-based module generation

A systematic method for automatic custom layout of analog integrated circuits is presented. This method uses analog circuit recognition and critical net analysis techniques to derive proper layout constraints for analog circuit performance optimization. Constraint-driven analog floorplanning and routing techniques are developed to generate custom layouts which incorporate the layout constraints. This method can be applied to handle a wide variety of analog circuit modules as well as analog subsystems. Experimental results on CMOS operational amplifiers and a comparator are presented.<
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