ESD Protection Circuit with Separated GGNMOS Segment for Input Protection

An ESD protection circuit in chip level protection is proposed as the electrostatic discharge (ESD) clamping circuit such as thick field oxide (TFO), grounded gate MOS (GGNMOS) and separated segment for input protection. The ESD protection circuit for input protection was implemented from the proposed ESD protection circuit. The GGNMOS applied to separated segment has been simulated by DESSIS of TCAD for thermal characteristic with human body model (HBM) pulse and realized the protection circuit for input protection has been simulated by HSPICE.