A 5GHz CMOS monolithic fractional-N frequency synthesizer

A 5GHz monolithic fractional-N frequency synthesizer is implemented in 0.18-/spl mu/m CMOS technology. In this frequency synthesizer, the center frequency of VCO is twice that of the required LO frequency and the quadrature LO is generated through a divide-by-2 circuit. A 3-b third-order /spl Delta//spl Sigma/ modulator is employed to randomize the division ratio and the phase noise performance is improved. Simulation result shows that the phase noise of the whole frequency synthesizer is less than -125dBc/Hz (3MHz) and the settling time is 25/spl mu/s. Having a frequency resolution of 8Hz, the frequency synthesizer meets the specifications of WLAN 802.11b/g and Bluetooth. The chip area is 1 mm /spl times/1.2mm and the current consumption is 30mA under a supply voltage of 1.8V.