System on chip evolution of a SIMD architecture for image processing

This paper presents the current evolution of the associative mesh project. It aims at the design of a reconfigurable, asynchronous and massively parallel SIMD architecture, targeted towards image analysis implementation. Its basic principle relies on the use of global operations (associations) that, given any interpixel connection graph, can compute global operations over connected sets of these graphs. One of our current objectives is the implementation of an associative mesh with a SoC-type circuit. In this paper, we examine which architectural modifications would this approach imply. We also consider the benefits brought by this technique and the repercussions on the design's performances