A high performance multi-channel preamplifier ASIC

A preamplifier application-specific integrated circuit (ASIC) has been designed and built to improve performance of the vertex time projection chamber (VTPC) at Fermilab's Colliding Detector Facility. Design of the semicustom IC was completed by using a Tektronix QuickChip 2S bipolar linear array. The ASIC had six channels on a chip and provided lower noise, higher gain, lower power, and lower mass packaging than the device which it replaced. Actual performance of the preamplifier was found to match very closely the simulated performance. To reduce the mass of the complete circuit board, bare IC dice were mounted directly on a G-10 substrate using chip-on-board techniques.<
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