Managing A Large Volume of Design/Manufacturing/Test Data in a Chip And Module Factory

In its highly automated East Fishkill semiconductor facility, IBM has exploited the "gate array" concept to its fullest in the support of computers designed using VLSI. IBM's Engineering Design System (which has been described in several papers in the past) in conjunction with the Direct Release System provides machine designers with a fast, controlled environment for designing and releasing chip part numbers into East Fishkill and getting fast turnaround on newly designed chips for their engineering model machines. This paper describes how Programmers and Engineers at the East Fishkill facility solved the huge logistical and information management problems associated with handling the large volume of unique chip part numbers that are released into East Fishkill with requests for quick shipment of hardware at that released design level. The problems discussed involve providing accurate, timely manufacturing information, tracking the product in the line, and collecting/analyzing in-process and final test results for thousands of unique part numbers.