Distortion in RF CMOS short-channel low-noise amplifiers

An approach to estimate the distortion in CMOS short-channel (e.g. 0.18-/spl mu/m gate length) RF low-noise amplifiers (LNAs), based on Volterra's series, is presented. Compact and accurate frequency-dependent closed-form expressions describing the effects of the different transistor parameters on harmonic distortion are derived. For the first time, the second-order distortion (HD2), in CMOS short-channel based LNAs, is studied. This is crucial for systems such as homodyne receivers. Equations describing third-order intermodulation distortion in RF LNAs are reported. The analytical analysis is verified through simulations and measured results of an 0.18-/spl mu/m CMOS 5.8-GHz folded-cascode LNA prototype chip geared toward sub-1-V operation. It is shown that the distortion is independent of the gate-source capacitance C/sub gs/ of the MOS transistors, allowing an extra degree of freedom in the design of LNA circuits. Distortion-aware design guidelines for RF CMOS LNAs are provided throughout the paper.