Asuka Project - mission and status

An SoC device necessitating low power features has been increasingly significant for the coming information network society. On the other hand, the higher technology barrier (red brick wall in IRTS) has resulted in enormous R&D investment, so that the Japanese semiconductor manufacturers may collaborate with pre-competitive R&D tasks for the advanced SoC devices. On the basis of this background, this paper reports on development of the 65 nm node device process technologies in the ASUKA Project.