Packaging: past, present and future

In the past, microsystems packaging played two roles: 1) It provided I/O connections to and from devices, referred to as IC or wafer level packaging, and 2) It interconnected both active and passive components on system level boards, referred to as systems packaging. Both were accomplished by interconnections or multilayer wiring at the package or board level. More recently, the IC devices have begun to integrate not only more and more transistors but also active and passive components on an individual chip, leading the community to believe that someday there may be a single-chip system, referred to as SOC or system-on-chip. This can be called horizontal or 2D integration of IC blocks toward systems. The community began to realize, however, that such an approach presents fundamental, engineering and investment limits and computing and integration limits for wireless and wired communication systems over the long run. This led to 3-D packaging approaches, often referred to as SIP or system-in-package. The SIP, while providing major opportunities in both miniaturization and integration for advanced and portable electronic products, is limited by the CMOS process just like the SOC. Some existing and emerging applications, however, include sensors, memory modules and embedded processors with DRAMs. More recent 3-D solutions, which incorporate stacked package approaches, offer solutions towards faster time-to-market and business impediments that have plagued MCM deployment for the past decade. There is a new concept which is called SOP or system-on-package. With SOP, Wit package, not the board, is the system. As such, SOP is beginning to address the shortcomings of both SOC and SIP, as well as traditional packaging which is bulky, costly, and lower in performance and reliability than ICs, in two ways: It uses CMOS-based Si for what it is good for, namely, for transistor integration, and the package, for what it is good for, namely, RF, optical and digital integration by means of IC-package-system co-design. The SOP package, therefore, overcomes both the computing limitations and integration limitations of SOC, SIP, MCM and traditional system packaging. It does this by having global wiring as well as RF, digital and optical component integration in the package, not in the chip. SOP, therefore, includes both active and passive components including embedded digital, RF and