A CMOS frequency synthesizer for multi-standard wireless devices

This paper presents a CMOS frequency synthesizer for wireless transceivers that support several communication standards namely GSM, WCDMA, IEEE 802.11b, and Bluetooth. The architecture is based on a multi-stage phase-locked loop where each stage differs from the others in the parameters of its charge pump and loop filter. It is designed using mathematical models and refined through simulation using different software tools depending on the required perspective. The architecture and the components presented pave the way to provide a low cost, fully integrated implementation.