A 2.0-V folding circuit using current limiting amplifier for ADC

This paper presents a low voltage folding circuit for folding and interpolating ADCs. In general, reducing the supply voltage of the conventional folding circuit with source coupled pairs prevents it from working because the conventional circuit has large output voltage range, and it is difficult to decrease the reference voltages. This is because decreasing reference voltages cause increasing zero-crossing error and decreasing peak output current. The proposed circuit using current limiting amplifier realizes small zero-crossing error and a supply voltage of 2.0V. The operation has been confirmed by simulation using a 0.35/spl mu/m CMOS technology.