A 1.9 GHz CMOS class E power amplifier with +29 dBm output power and 58% PAE

This paper investigates the feasibility of designing a high power, high efficiency class E power amplifier fully integrated in CMOS and accordingly presents the design of a 1.9 GHz two-stage class E power amplifier in a standard 0.25 /spl mu/m CMOS technology. Excluding the final output matching network, all passives of interstage and input matching networks are on-chip components. Working with a 2.5 V supply, the amplifier achieves a simulated 4-29 dBm output power with 58% PAE. With a suitable linearization scheme, the power amplifier can be used in a UMTS transmitter.