The application of BT-FinFET technology for sub 60nm DRAM integration

In this paper, the application of body tied FinFET is presented for a technology breakthrough beyond sub 60nm. DRAM on bulk Si substrate has been successfully integrated and the characteristics were compared to recess channel and planar cell array transistor DRAM. We present a comparison of three different device structures and show damascene BT-FinFET using NWL (negative word line) scheme with low channel for a highly manufacturable DRAM for sub 60nm technology node.