Design of a novel three-valued static memory using Schottky barrier carbon nanotube FETs

This paper proposes a novel three-state memory using scaled Schottky-barrier carbon nanotube field effect transistors (SB CNFETs). The design utilizes the inherent ambipolar device characteristics of the SB CNFET. Simulation results show /spl sim/37% area reduction and /spl sim/30% reduction of total power in a 64 KB memory array.