IDDQ test generation for BF fault in combinational circuit based on genetic algorithms

This paper presents an improved genetic algorithm to generate compact test sets for IDDQ testing for bridging faults in combinational circuits. Through local optimizing, choosing BF faults, genetic algorithms, the faults test sets are generated gradually and the faults are tested and located fast through our algorithm. The simulation results on an ISCAS'85 circuit show the validity of the algorithm for generation of fault test set.