PBTI & HCI characteristics for high-k gate dielectrics with poly-Si & MIPS (metal inserted poly-Si stack) gates

Reliability characteristics of high-k gate dielectrics with poly-Si gates and metal inserted poly-Si stack (MIPS) gates are investigated in terms of positive bias temperature instability (PBTI) and hot carrier injection (HCI) characteristics. The results indicate that the dopants (P or As) from the poly-Si severely degrade PBTI and HCI characteristics. Therefore, the high-k/MIPS structure, which is not influenced by gate dopants, shows significant improvement in PBTI and HCI characteristics. For the same reason, the worst HCI condition of high-k/poly-Si structure is V/sub g/=V/sub d/ instead of V/sub g/ at I/sub sub/spl I.bar/max/, while that of high-k/MIPS structure is V/sub g/ at I/sub sub/spl I.bar/max/.