Noise behavior of elementary transconductors stages in bipolar and CMOS technology

In this paper a comparative analysis of the noise behavior of two topologies of elementary transconductor stages (with differential pair and with second generation current conveyor - CCII) in bipolar and CMOS technology is presented. This study is made by a theoretical calculation of the signal to noise ratio (SNR) for each considered configuration, and also by a 0.8 mum BiCMOS technology simulations; SNR is a very important criterion for noise behavior assessment of a circuit. The paper shows that a CCII stages transconductor has a better noise behavior than a differential pair one, for the same values of circuits transconductances, independent of the technology used (bipolar or CMOS).