Device characterization of p-channel AlGaAs/GaAs MIS-like heterostructure FET's

p-channel AlGaAs/GaAs MIS-like heterostructure FET's (p-MIS HFET's) are characterized concerning their gate-source leakage current. Device performance is confirmed to improve approximately inversely to layer thickness d
t
between the channel and metal gate, at low gate voltages. A high transconductance g
m
of 110 ms. mm
-1
is obtained at 77 K by reducing d
t
to 20 nm. Maximum transconductance is limited by gate-source leakage current I
gs
. I
gs
is governed mainly by the leakage current through the ion-implanted gate edge and is reduced by decreasing the dose level of ion-implantation at the gate edge to 2 × 10
¹³
cm
^-2
. The contact resistance is reduced to about 0.1 ω. mm by ion implantation into the ohmic contact region to a dose of 2 × 10
¹⁴
cm
^-2
. Calculations indicate that, by reducing I
gs
and the gate-source resistance to 1 ω. mm with the lightly doped drain (LDD) structure, g
m
around 200 mS. mm
^-1
at 300 K and 300 mS. mm
^-1
at 77 k are achievable with a 1-µm gate structure.