A planarized SiO2interlayer dielectric with bias-CVD

A Bias-CVD
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process has been developed for depositing planarized silicon dioxide films. The process uses, in addition to PECVD deposition, an argon ion etch for planarization. A distinguishing feature of this process is the use of a unique sequence of depositions and etching to control contour and topography, eliminate keyholing, and reduce pinhole density. By varying this Sequence, the film topography can range from conformal to fully planarized. A cold-wall low-pressure CVD system with an eight-wafer batch and 13.56-MHz RF capability was used in this study. Because of the chamber geometry, a dc bias is induced in the wafer support during the RF plasma processing. This bias, typically a few hundred volts, provides the accelerating field for the ion etching of the film. It is the anisotropy of this etch that makes planarization possible. The film has the density and index of refraction of thermally grown oxide. The Si to O ratio is 1 to 1.9 with 8-percent nitrogen and 0.1-percent argon, by RBS. SIMS analysis shows no trace of heavy metals. The effect of process parameters has been characterized. Dynamic RAM's deposited with the sloped film show normal yield and electrical properties; there is no evidence of radiation damage.