Vertical enhancement-mode InP MISFET's fabricated on n-type substrate

We report a new vertical structure InP enhancement-mode MISFET. These transistors are made on an Fe-doped semi-insulating InP epitaxial layer grown by organometallic vapor-phase epitaxy (OMVPE) on an n-type InP substrate. Thermally evaporated borosilicate is used as the gate insulator. Transconductances as high as 100 mS/mm have been achieved with a gate length of approximately 2.8µm. The novelty and potential advantages of the vertical structure are discussed.