A high-yield GaAs MSI digital IC process

A planar GaAs digital IC process capable of fabricating MSI level circuits with a high yield has beer. demonstrated. The process has been characterized through extensive evaluation of test structures. Uniformity of process and device parameters is shown by statistical analysis of autoprobe test data on the test key. An empirical model is proposed that correlates process yield to active gate area for typical digital ICs fabricated with the process. Demonstration of such high yields indicates maturity of GaAs process technology.