An extended operation of three-phase SCCD's by controlled free-charge transfer

The high-frequency limitation due to backflow in the two-level clock mode of operation of a three-phase CCD is overcome by introducing a small step in the clock waveform. The step is small enough not to affect the signal handling capability of the gates, and is adequate to offer a barrier to backflow of charge. It has been demonstrated that the scheme permits the use of clocks with fast rise time and hence extends the operating range of frequency.