Fabrication of high-performance LDDFET's with Oxide sidewall-spacer technology

A fabrication process for the Lightly Doped Drain/Source Field-Effect Transistor, LDDFET, that utilizes RIE produced SiO
2
sidewall spacers is described. The process is compatible with most conventional polysilicon-gated FET processes and needs no additional photomasking steps. Excellent control and reproducibility of the n
^-
region of the LDD device are obtained. Measurements from dynamic clock generators have shown that LDDFET's have as much as 1.9X performance advantage over conventional devices.