Fabrication technology for an 80-ps normally-off GaAs MESFET logic

Fabrication technology of a high-speed normally-off GaAs MESFET logic has been described. Anodic Oxidation process is applied to control epitaxial layer thickness precisely. A SiO
2
cap during alloying ohmic metal is used to prevent the ohmic layer surface from becoming uneven. A sloped mesa structure edge is used to avoid disconnection of metal interconnection. Electron-beam direct writing is employed to define a submicrometer gate. Applying these technologies, high-speed and small switching energy have been accomplished. The minimum delay timd and the associated switching energy were 77 ps and 75 fJ at room temperature and 51 ps and 97 fJ at 77 K.