Fabrication and properties of ESFI-SOS-MOST's suitable for both low-voltage and low-power circuits

The fabrication and the properties of ESFI-SOS p-channel deep-depletion and n-channel inversion transistors are discussed. These devices are aimed to be used in integrated circuits with both low supply voltage and low power consumption. It turns out that certain device parameters such as reverse current, leakage current, threshold voltage, and channel mobility are strongly correlated and that a proper set of process parameters (e.g., optimum process temperature, ion implantation dose, and implantation energy) exists permitting device fabrication most suitable to meet the goal mentioned above. Furthermore, the subthreshold behavior is investigated experimentally and theoretically and the density of fast interface states at the SiO
2
-Si interface is determined.