Analysis of the behaviour of LEC structures applied to multiepitaxial silicon power transistors

Low frequency silicon power transistors of LEC structure (Low Emitter Concentration) have been elaborated and compared with transistors of conventional structure. At first, the current gain characteristics are analysed. It is shown that the emitter injection efficiency of LEC structures results from the integrated charge carrier concentrations. The most interesting property of LEC structures represented fig. 1a is the remarkable improvement of the second breakdown behaviour. In order to analyse it, several structure parameters have been varied mainly the width of the lateral layer, the thickness W
N
of the lighly doped emitter layer, the emitter perimeter. The properties observed at low current level are in agreement with considering the parallel association of the central LEC transistor (N
⁺
N
2
PN
1
) of high gain, the periphe ral transistor of standard configuration (N
2
P N
1
) of low gain, and in some cases the diode N
2
P
⁺
. At moderate current level the transverse voltage drop in the N
2
layer focusses the emitter current under the central N
⁺
zone. On the contrary at high voltage, close to the second breakdown region, the emitter current spreads into the peripheral N
2
layer. This crowding effect explains the increase of available power at high voltage with distance d. The parameter W
N
cannot be varied as much as d because of the decrease of transition frequency at high values of W
N
, introduced by emitter charge storage. As an example such a structure has been applied to a transistor of 100 W power. The SOAR curves show that with d = 60 µ, the second breakdown does not appear at a voltage lower than BV
CEO
. This type of structure is particurlarly well adapted to medium power transistors designed for safe operation with inductive loads.