Nonvolatile static read/write memory cell using CMNOS structure

A new type of nonvolatile static read/write memory cell constructed with three MOS transistors and one MNOS transistor is proposed. The MNOS transistor and one of the MOS transistors involved are complementary combined to offer binary states in the Λ-shaped
I-V
curve for memory operation under normal power supply. Upon power failure, the MNOS transistor acts as a back-up element for nonvolatility. The new cell is characterized by advantageous features such as small cell size, simple peripheral circuit, operation with a unipolar power supply and low standby power consumption.