Design of VLSI adaptive neural network

The design and simulation of an adaptive analog neural architecture which is highly suitable for CMOS VLSI implementation are reported. To allow the construction of these networks, CMOS analog VLSI building blocks (synapse and neuron) were proposed. The speciality of the synapse module is its ability to perform the learning phase on the chip itself based on a learning rule denoted by the sign algorithm. A neuron circuit based on a sigmoid function was developed. Simulations demonstrate the learning capability of this synapse circuit and the versatility of the neuron circuit, which establish a VLSI modular architecture for composing a large-scale neural network system. The application of the architecture is illustrated by several examples to verify the design concepts.<
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