A 0.9V 960MHz CMOS radio front end employing a doubly balanced transconductance mixer

A 960MHz CMOS low voltage radio front end architecture is presented. The circuit employs a doubly balanced transconductance mixer. The radio front end achieves a power gain of 6dB, an input referred third order intercept (IIP3) of -3dBm and single sideband noise figure of 11 dB at 0.9V supply voltage and 20mW power dissipation. The circuit is realised in 0.6µn CMOS technology; it occupies an area of 1mm × 0.7mm.