Developer selection for T-shaped gate FET's using PMMA/P(MMA-co-MAA)/PMMA

A T-shaped gate fabrication process has been developed based on a triple-layer resist system with gate cross section control by resist developer formulation. The new procedure allows a conventional e-beam exposure and single develop step to accomplish what requires position dependent e-beam doses or multiple exposures and multiple develop steps in other processes. General considerations in developer selection are discussed. For the process conditions used in this study, gate lengths from 80 to 280 nm were obtained from doses from 250 to 350 mu C/cm/sup 2/ with 20-keV electrons. Initial results on RF performance for a 1.2-mm periphery power FET are given.<
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