A concurrent 0.18-/spl mu/m CMOS self-biased dual-band driver amplifier for IEEE 802.11 a/b/g

A 2.4 GHz/5.2 GHz self-biased dual band CMOS driver amplifier with a 9.8-dBm output power using TSMC 0.18-/spl mu/m 1P6M standard CMOS process is described. The CMOS amplifier designed on Rogers RO4003 printed-circuit-board (PCB) with a single input and a single output signal chain is simultaneously optimized for wireless local area network (WLAN) 2.4 GHz/5.2 GHz applications. Simulation results show that the driver amplifier exhibits an output power about 9.7-dBm in both 2.4 GHz and 5.2 GHz, output interception point (OIP3) of 24dBm with power added efficiency (PAE)=27% and PAE=24% in 2.4GHz and 5.2 GHz respectively. The die size is 0.85/spl times/0.7 mm/sup 2/.