Modeling the effects of patterning error on MOSFET

During IC fabrication, layout shapes do not exactly replicate onto wafers due to distortions in pattern-transfer processes. Conformal mapping is used to give a simple model to estimate the effect of the distortion on the I-V characteristics of MOSFETs. The method is verified by the device simulator DA VINCI. The impact of pattern distortion of MOSFET on circuit performance is also examined by the proposed model.