A fast variable-length decoder with optimized lookup tables on FPGA [MPEG applications]

A novel high performance variable-length code (VLC) decoder for MPEG applications is proposed. It has higher throughput and requires smaller memory resources by group matching and lookup table optimization. Group matching is developed to simplify matching procedure and reduce the process time. Group recombination, group decomposition and group properties are applied to optimize the lookup tables, which removes the redundant bits and reduces the implementation complexity. This decoder is implemented on FPGA and the throughput is about 55 Msymbols/s at 55 MHz clock rate.