DRAM standby current failure: the influence of hot carrier degradation on voltage level-up shifter circuit

In this report, the phenomenon of standby state current failure of dynamic random access memory (DRAM), which incorporates a low voltage to high voltage CMOS level-up shifter, was investigated. As a result, DRAM standby current failure due to on/off time delay of the level shifter circuit has been identified as being responsible for n-MOSFET ON-state current decrease by hot carrier injection (HCI).