A new multilevel inverter topology

Multilevel converters are being considered for an increasing number of applications due to their high power capability, associated with lower output harmonics and lower commutation losses. Their main disadvantage is their complexity which requires both a great number of power devices and a rather complex control circuitry. In this work a new inverter topology using an auxiliary switch is presented, reducing the number of power devices required to implement a multilevel output. The topology is tested in the design of a 5 levels H bridge simplified inverter; circuit operation is presented, simulated in SPICE and validated with experimental tests performed on a laboratory prototype. Additionally, the dedicated modulator circuit required for multilevel inverter operation is implemented using a FPGA circuit, reducing overall system cost and complexity.