Temperature-compensated reference circuits for SOI

Two novel reference circuits that exploit unique aspects of SOI technology are reported. The first is a voltage reference based on the G/sup 4/-FET, a new four-gate transistor possible only in SOI; which achieves a temperature-compensated output voltage without the use of the standard bandgap architecture. The second is a current reference that uses the zero leakage p-well resistor available in many SOI technologies to achieve a low-level, temperature-stable reference current that exceeds the specifications of bulk CMOS low-level current references reported in the literature. Both reference circuits have been implemented in a standard 3.3-V/0.35-/spl mu/m partially depleted (PD)-SOI process.